A C-T filter compiler - from specifications to layout

This paper presents an analog Design Automation tool implemented within the Cadence Edge system, using the Cadence programming language Skill and other useful Cadence tools. Given standard filter specifications, the tool generates Continuous-Time filter blocks implementing the desired function. A numerical optimization technique is used to cancel response errors, introduced by the non-ideal circuit elements available for real filter realizations. Except for an operational amplifier which must be provided by the user, component layout is performed by dedicated module generators, and the final filter layout is assembled using the Cadence Edge place & route program. In the current version of the program, the only available filter topology is the MOSFET-C topology. However, an hierarchical, object oriented approach is adopted, in order to ensure reusability and extensibility of the tool. Each general aspect of a filter design is accessed through a uniform interface from the higher level of hierarchy, allowing dedicated procedures depending on the particular implementation to deal with the details, without affecting the workings of the tool at the higher level of hierarchy.