High performance SCRs for on-chip ESD protection in high voltage BCD processes

ESD protection structures based on triggering devices for on-chip ESD protection in a 100V BCD process have been designed and analyzed using physical process and device simulation (TCAD), followed by pulse measurements of test-structures. Based on the resultant data a self-protecting high-voltage bipolar SCR structure with a ten-fold increase in the protection level compared to the reference BJT was developed. The effect of blocking the N-buried layer (NBL) was found to be critical for stable ESD operation.

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