Study of Local BTI Variation and its Impact on Logic Circuit and SRAM in 7 nm Fin-FET Process

This paper presents an analysis of impact of local bias temperature instability (BTI) by measuring Ring-Oscillators (RO) with short stage and its impact on Logic circuit and SRAM. The evaluation result of local BTI variation based on measuring RO at a test chip fabricated in 7 nm FinFET process shows that the standard deviation of NBTI $\boldsymbol{Vth}$ degradation is proportional to the square root of the mean value ($\boldsymbol{\mu}(\mathbf{\Delta} \boldsymbol{Vthp})$) at any stress time, $\boldsymbol{Vth}$ flavors and various recovery condition. Based on these measurement result, we present an analysis of its impact on logic circuit with considering measured $\boldsymbol{Vth}$ dependency on global NBTI. We also analyze its impact on SRAM minimum operation voltage ($\boldsymbol{V_{min}}$) of static noise margin (SNM) and shows nonnegligible $\boldsymbol{V_{min}}$ degradation due to local NBTI.

[1]  Wen Liu,et al.  Cap layer and multi-work-function tuning impact on TDDB/BTI in SOI FinFET devices , 2018, 2018 IEEE International Reliability Physics Symposium (IRPS).

[2]  S. Ramey,et al.  Transistor reliability variation correlation to threshold voltage , 2015, 2015 IEEE International Reliability Physics Symposium.

[3]  Koji Nii,et al.  A Fully Standard-Cell Based On-Chip BTI and HCI Monitor with 6.2x BTI sensitivity and 3.6x HCI sensitivity at 7 nm Fin-FET Process , 2018, 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC).

[4]  R. Huang,et al.  Variability-and reliability-aware design for 16/14nm and beyond technology , 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

[5]  Miaomiao Wang,et al.  Superior PBTI Reliability for SOI FinFET Technologies and Its Physical Understanding , 2013, IEEE Electron Device Letters.

[6]  Koji Nii,et al.  Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..