论文信息 - Parallel and Multiplex Architecture of AES-CCM Coprocessor Implementation for IEEE 802.15.4

Parallel and Multiplex Architecture of AES-CCM Coprocessor Implementation for IEEE 802.15.4

The MAC layer of 802.15.4 uses the AES-CCM protocol as security mechanism, it uses the AES algorithm as the core, uses CTR mode to ensure confidentiality of data, uses CBC-MAC mode to authenticate the public information of the header in MAC frame. This paper presents an AES hardware accelerator module and two implementations of AES-CCM coprocessor: one for high throughput with parallel AES module and one for low cost with multiplex AES module. For easy of integration and portability, the coprocessor uses Avalon bus interface standard, and it is verified on Altera EP1CF324C6 FPGA platform. This design and implementation of the security coprocessor has a certain value for the generalization the wireless communication terminal hardware platform.

Deyu Qi | Bin Feng | Haiwen Han

[1] Vincent Rijmen,et al. The Design of Rijndael: AES - The Advanced Encryption Standard , 2002 .

[2] Arshad Aziz,et al. An FPGA-based AES-CCM Crypto Core For IEEE 802.11i Architecture , 2007, Int. J. Netw. Secur..

[3] 尚弘島影. National Institute of Standards and Technologyにおける超伝導研究及び生活 , 2001 .

[4] Chakib Alaoui. New Experimental Results for AES-CCMP Acceleration on Cyclone-II FPGA , 2010 .

[5] R. Cumplido,et al. FPGA implementation cost and performance evaluation of the IEEE 802.16e and IEEE 802.11i security architectures based on AES-CCM , 2008, 2008 5th International Conference on Electrical Engineering, Computing Science and Automatic Control.

[6] M. Hannikainen,et al. Efficient hardware implementation of security processing for IEEE 802.15.4 wireless networks , 2005, 48th Midwest Symposium on Circuits and Systems, 2005..