A New On-Chip CMOS Active Balun Integrated With LNA

The design and simulation of an innovative monolithic active balun integrated with low noise amplifier, is described in this paper. The fully integrated circuit was implemented in a 0.35 mum AMS CMOS standard technology. The simulations, optimized to noise performance, minimum differential phase and magnitude error, were performed with BSIM3 model Circuit simulations present 20.6dB differential power gain at 2.4 GHz, a phase and a transducer gain magnitude errors less than 0.2deg and 0.04 dB, respectively, in a 1GHz span around 2.4 GHz, a 3.7dB noise figure, a 2 dBm output-referred ldB compression point, 50 Omega input and output match, while drawing 11mA from a 3V power supply.

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