Designing Facility Layouts with Hard and Soft Constraints by Evolutionary Algorithm

Facility layout exerts a significant effect on factory operations and performance. Layout problems and floorplanning problems have been studied in the past decades. These problems typically involve locating objects of various sizes in a space for a certain objective. This paper presents a novel layout problem formulation, called the constrained facility layout problem (CFLP), aiming to find the layout with minimal covering area and connection length. In addition, the CFLP includes a hard constraint on the spatial clearance and a soft constraint on the geometrically relative order. The movability of objects is further considered in the CFLP. The formulation of CFLP is pertinent to industrial cases. To solve the CFLP, we adopt the covariance matrix adaptation evolution strategy (CMAES), a powerful evolutionary algorithm on numerical optimization. The proposed CFLP formulation and CMAES are utilized to solve the real-world facility layout problems of CTCI Corporation, which is a world-leading engineering services provider. The results show the high capability and advantages of the proposed approach in producing satisfactory layouts within very competitive time cost, in comparison to the layouts generated by human experts.

[1]  Evangeline F. Y. Young,et al.  Slicing floorplans with pre-placed modules , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[2]  Nikolaus Hansen,et al.  The CMA Evolution Strategy: A Comparing Review , 2006, Towards a New Evolutionary Computation.

[3]  Narayanan Vijaykrishnan,et al.  Thermal-aware floorplanning using genetic algorithms , 2005, Sixth international symposium on quality electronic design (isqed'05).

[4]  Pearl Y. Wang,et al.  VLSI placement and area optimization using a genetic algorithm to breed normalized postfix expressions , 2002, IEEE Trans. Evol. Comput..

[5]  Srinivas Katkoori,et al.  An Elitist Non-Dominated Sorting Based Genetic Algorithm for Simultaneous Area and Wirelength Minimization in VLSI Floorplanning , 2008, 21st International Conference on VLSI Design (VLSID 2008).

[6]  Henri Pierreval,et al.  Facility layout problems: A survey , 2007, Annu. Rev. Control..

[7]  Yao-Wen Chang,et al.  B*-trees: a new representation for non-slicing floorplans , 2000, Proceedings 37th Design Automation Conference.

[8]  S. Maouche,et al.  Evolutionary search techniques application in automated layout-planning optimization problem , 1995, 1995 IEEE International Conference on Systems, Man and Cybernetics. Intelligent Systems for the 21st Century.

[9]  Maurizio Rebaudengo,et al.  GALLO: a genetic algorithm for floorplan area optimization , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  Evangeline F. Y. Young,et al.  Placement constraints in floorplan design , 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[11]  Ronald L. Graham,et al.  Floorplan representations: Complexity and connections , 2003, TODE.

[12]  Yao-Wen Chang,et al.  TCG: a transitive closure graph-based representation for non-slicing floorplans , 2001, DAC '01.

[13]  Takeshi Yoshimura,et al.  An O-tree representation of non-slicing floorplan and its applications , 1999, DAC '99.

[14]  R. K. Ursem Multi-objective Optimization using Evolutionary Algorithms , 2009 .

[15]  De-Sheng Chen,et al.  An efficient genetic algorithm for slicing floorplan area optimization , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[16]  Nikolaus Hansen,et al.  Completely Derandomized Self-Adaptation in Evolution Strategies , 2001, Evolutionary Computation.

[17]  Yoji Kajitani,et al.  VLSI module placement based on rectangle-packing by the sequence-pair , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[18]  Yoji Kajitani,et al.  Module placement on BSG-structure and IC layout applications , 1996, ICCAD 1996.