A compact R-2R DAC for BIST applications

This paper presents the implementation of a compact R-2R Digital-to-Analog Converter (DAC) for BIST applications of analog and mixed-signal circuits. It focuses on evaluating the DAC design requirements and its possibilities in structural and alternate test methodologies. More concretely, the aim of the paper is the low-cost generation of digitally programmable DC voltages for parametric deviation injection. For the sake of validation, these voltages will be considered to modify the voltage references of bias circuit or cascode voltages in op-amps. The DAC has been implemented in a UMC 65nm LL CMOS process, and comprises a front-end passive R-2R ladder followed by an active buffer based on a two-stage amplifier with Miller's compensation. Special care has been taken in the resistors ladder layout, as a critical parameter to minimize the mismatch impact due to process variations and maximize the final static behavior. The total power consumption and overall die area for the R-2R DAC ladder are 120μW and 88x64μm2, respectively. The op-amp design could be optimized depending on the load and driving requirements.

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