A 17.5-Gb/s transceiver with a MaxEye-based autonomous adaptation
暂无分享,去创建一个
This paper demonstrates a 17.5-Gb/s complete transceiver with a MaxEye-based autonomous adaptation of equalization in a 40-nm CMOS process. The output stage of the transmitter employs 3-tap finite-impulse response (FIR) equalization. The receiver compensates the attenuation of the cable with a 2-stage continuous time linear equalizer (CTLE) and 5-tap decision-feedback equalizer (DFE). Based on the MaxEye algorithm, the peak gain of CTLE and the tap weights of DFE are adaptively controlled to support a wide range of channel characteristics. A dual-loop clock and data recovery circuit (CDR) using a bang-bang phase detector is implemented. The entire transmitter and receiver respectively consume 90.1 mW and 94.9 mW under a 0.9-V supply while operating at 17.5 Gb/s, respectively.
[1] Jihong Ren,et al. Near-Optimal Equalizer and Timing Adaptation for I/O Links Using a BER-Based Metric , 2008, IEEE Journal of Solid-State Circuits.
[2] Jung-Hoon Chun,et al. A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator , 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.
[3] Xuefan Jin,et al. A 12.5-Gb/s near-GND transceiver for wire-line UHD video interfaces , 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).