Reusability of test bench of UVM for Bidirectional router and AXI bus

[1]  Byeong Min,et al.  Beyond UVM for practical SoC verification , 2011, 2011 International SoC Design Conference.

[2]  Pg Scholar,et al.  Recent Survey for Bi-Directional Network on Chip Pipelined Architecture , 2012 .

[3]  Xu Chen,et al.  Development of Verification Environment for AXI Bus Using SystemVerilog , 2013 .

[4]  Yu Hen Hu,et al.  A Bidirectional NoC (BiNoC) Architecture With Dynamic Self-Reconfigurable Channel , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[5]  H. T. Mouftah,et al.  Bidirectional Multi-Constrained Routing Algorithms , 2014, IEEE Transactions on Computers.

[6]  Phil Moorby Design for verification with System Verilog , 2004, 17th International Conference on VLSI Design. Proceedings..

[7]  Ashish Khodwe Ashish Khodwe Efficient FPGA Based Bidirectional Network on Chip Router throgh Virtual Channel Regulator , 2013 .

[8]  Fu Qingchao,et al.  Design and Verification of a MAC Controller Based on AXI Bus , 2013, 2013 Third International Conference on Intelligent System Design and Engineering Applications.