A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller

A transformer-based dual band watt-level linear CMOS power amplifier is demonstrated for upcoming SDR mobile terminals. The proposed AM-PM distortion canceller improves ACLR of 3GPP WCDMA uplink signal by 2.6dB at 28.0dBm output power, and the designed interstage power distributor contributes to low-loss power supply for the driver stage and high common-mode stability. Moreover, a newly developed cascode biasing circuit guarantees AM-AM linearity of the PA in a wide supply voltage range from 2.5V to 3.6V. The test chip demonstrates peak output powers of 28.3dBm at 1.95GHz and 23.7dBm at 2.4GHz satisfying 3GPP WCDMA and IEEE802.11g spectrum masks with die area of 5.4mm2.

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