Performance of the Unified Readout System of Belle II

Belle II experiment at the SuperKEKB collider at KEK, Tsukuba, Japan has successfully started the data taking with the full detector in March 2019. Belle II is a luminosity frontier experiment of the new generation to search for physics beyond the Standard Model of elementary particles, from precision measurements of a huge number of B and charm mesons and tau leptons. In order to read out the events at a high rate from the seven subdetectors of Belle II, we adopt a highly unified readout system, including a unified trigger timing distribution system (TTD), a unified high speed data link system (Belle2link), and a common backend system to receive Belle2link data. Each subdetector frontend readout system has a field-programmable gate array (FPGA) in which unified firmware components of the TTD receiver and Belle2link transmitter are embedded. The system is designed for data taking at a trigger rate up to 30 kHz with a dead-time fraction of about 1% in the frontend readout system. The trigger rate during the nominal operation is still much lower than our design. However, the background level is already high due to the initial vacuum condition and other accelerator parameters, and it is the most limiting factor of the accelerator and detector operation. Hence the occupancy and the stress to the frontend electronics are rather severe, and they cause various kind of instabilities. We present the performance of the system, including the achieved trigger rate, dead-time fraction, stability, and discuss the experiences gained during the operation.