Effectiveness of embedded capacitors in reducing the number of surface mount capacitors for decoupling applications

Purpose – The purpose of this paper is to present an analytical approach to find the reduction in the required number of surface mount capacitors by the use of embedded capacitors in decoupling applications.Design/methodology/approach – The analytical model used to perform decoupling is cavity model from theory of microstrip antenna and N‐port impedance matrix. The methodology involves addition of decoupling capacitors between the power and the ground plane such that the impedance between ports on the power‐ground plane becomes lower than the target impedance at that frequency. A case study is presented in which a 0.3 m×0.3 m power‐ground plane is decoupled by using various combinations of surface mount capacitors and embedded capacitors in the frequency range of 0.001‐1 GHz and at a target impedance of 0.1, 0.01, and 0.001 Ω. The total number of surface mount capacitors are compared in each case.Findings – Use of embedded planar capacitors with a thin dielectric (about 8 mm) dampened board resonances at ...

[1]  Y. Lo,et al.  Theory and experiment on microstrip antennas , 1979 .

[2]  A. Madou,et al.  Electrical behavior of decoupling capacitors embedded in multilayered PCBs , 2001 .

[3]  Richard Ulrich,et al.  Integrated passive component technology , 2003 .

[4]  I. Novak,et al.  Accuracy considerations of power-ground plane models , 1999, IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412).

[5]  B. Archambeault,et al.  A simple finite-difference frequency-domain (FDFD) algorithm for analysis of switching noise in printed circuit boards and packages , 2003 .

[6]  Chien-Chang Huang Cavity model applied to power/ground plane structures , 2005, 2005 IEEE Antennas and Propagation Society International Symposium.

[7]  Barry Kent Gilbert,et al.  High-frequency characterization of power/ground-plane structures , 1999 .

[8]  Nanju Na,et al.  A methodology for the placement and optimization of decoupling capacitors for gigahertz systems [CMOS VLSI] , 2000, VLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design.

[9]  Ruey-Beei Wu,et al.  Optimization for the Locations of Decoupling Capacitors in Suppressing the Ground Bounce by Genetic Algorithm , 2005 .

[10]  Nanju Na,et al.  Modeling and transient simulation of planes in electronic packages , 2000 .

[11]  Bruce Archambeault,et al.  EMI/EMC Computational Modeling Handbook , 1998 .

[12]  V. Sundaram,et al.  Design, Modeling, and Characterization of Embedded Capacitor Networks for Core Decoupling in the Package , 2007, IEEE Transactions on Advanced Packaging.