Run-time support for heterogeneous multitasking on reconfigurable SoCs

In complex reconfigurable systems on chip (SoC), the dynamism of applications requires an efficient management of the platform. To allow run-time management of heterogeneous resources, operating systems (OS) and reconfigurable SoC platforms should be developed together. For run-time support of reconfigurable architectures, the OS must abstract the reconfigurable computing resources and provide an efficient communication layer. This paper presents our efforts to simultaneously develop the run-time support and the communication layer of reconfigurable SoCs. We show that networks-on-chip (NoC) are an ideal communication layer for dynamically reconfigurable SoCs, explain how our OS provides run-time support for dynamic task relocation and detail how hardware parts of the OS are integrated into the higher layers of the NoC. An implementation of the OS and of the dedicated communication layer on our reconfigurable architecture supports the concepts we describe.

[1]  Rudy Lauwereins,et al.  Real-time 3D applications on mobile platforms with run-time reconfigurable hardware accelerator , 2002 .

[2]  Axel Jantsch,et al.  Will Networks on Chip Close the Productivity Gap? , 2003, Networks on Chip.

[3]  Alain Greiner,et al.  A Scalable Architecture for System-on-Chip Interconnections , 1999 .

[4]  Jari Nurmi,et al.  An IP-Based On-Chip Packet-Switched Network , 2003, Networks on Chip.

[5]  Rudy Lauwereins,et al.  Infrastructure for design and management of relocatable tasks in a heterogeneous reconfigurable system-on-chip , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[6]  Mukesh Singhal,et al.  Advanced Concepts In Operating Systems , 1994 .

[7]  Swaroop Sridhar,et al.  An approach to heterogeneous process state capture/recovery to achieve minimum performance overhead during normal execution , 2003, Proceedings International Parallel and Distributed Processing Symposium.

[8]  Rudy Lauwereins,et al.  Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems , 2003, Engineering of Reconfigurable Systems and Algorithms.

[9]  Alberto L. Sangiovanni-Vincentelli,et al.  Interface-based design , 1997, DAC.

[10]  Kang G. Shin,et al.  Support for Multiple Classes of Traffic in Multicomputer Routers , 1994, PCRCW.

[11]  Kees G. W. Goossens,et al.  Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip , 2003, DATE.

[12]  Hugo De Man On Nanoscale Integration and Gigascale Complexity in the Post.Com World , 2002, DATE.

[13]  Rudy Lauwereins,et al.  Reconfigurable SoC - What Will it Look Like? , 2002, DATE.

[14]  Mukesh Singhal,et al.  Advanced concepts in operating systems : distributed, database, and multiprocessor operating systems , 1993 .

[15]  Rudy Lauwereins,et al.  Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs , 2002, FPL.

[16]  Rudy Lauwereins,et al.  Highly scalable network on chip for reconfigurable systems , 2003, Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748).

[17]  Rudy Lauwereins,et al.  Designing an operating system for a heterogeneous reconfigurable SoC , 2003, Proceedings International Parallel and Distributed Processing Symposium.

[18]  Rudy Lauwereins,et al.  Networks on Chip as Hardware Components of an OS for Reconfigurable Systems , 2003, FPL.

[19]  Luca Benini,et al.  Networks on Chips : A New SoC Paradigm , 2022 .

[20]  Sudhakar Yalamanchili,et al.  Interconnection Networks: An Engineering Approach , 2002 .

[21]  Reinhard Männer,et al.  Multitasking on FPGA Coprocessors , 2000, FPL.

[22]  Alain Greiner,et al.  A generic architecture for on-chip packet-switched interconnections , 2000, DATE '00.