An investigation on FPGA based energy profiling of multi-core embedded architectures

Power and energy profiling of multi-core embedded SoC designs is a daunting task due to the lack of fine grain accurate and high sampling rate monitoring infrastructures. Furthermore, shared components used in common by multiple processing cores, make these designs difficult to analyze consumption of concurrent threads. FPGA development boards are currently used to implement multi-core SoC prototypes in order to validate them on real hardware and to perform thoroughly performance profiling. In this paper, we investigate the capacity of FPGA designs to profile the power consumption and energy usage of multi-core embedded architectures and application benchmarks running on them.