On-chip implementation of a multi-output voltage regulator based on single inductor Buck Converter topology

This paper presents the chip design of a single inductor triple output buck converter with interleaved switched capacitor outputs with only the passive elements being off-chip. Transient overshoots occur in all the output voltages during load transients due to cross regulation effect amongst the coupled outputs. This has been minimized using a priority based novel control technique. The error amplifiers are designed accordingly. The dead band circuitry amongst the output switches have been optimally designed so that the power MOSFET's do not breakdown at the instance when all the output switches are momentarily turned OFF. Moreover, selection of the size of the power switches has been a significant contribution as their stray capacitances are used to hold the voltage across the power switches during dead band condition. The chip has been implemented on 1.5mum process following DSL specifications. The post layout simulation results are presented in the paper and they all prove the stable operation of the circuit and the validation of the stated theories.

[1]  Chi-Ying Tsui,et al.  Single-inductor multiple-output switching converters with time-multiplexing control in discontinuous conduction mode , 2003, IEEE J. Solid State Circuits.

[2]  Chi-Ying Tsui,et al.  A pseudo-CCM/DCM SIMO switching converter with freewheel switching , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

[3]  Ieee Circuits,et al.  20th International Conference on VLSI Design : held jointly with 6th International Conference on Embedded Systems : proceedings : 6-10 January, 2007, Bangalore, India , 2007 .

[4]  Wing-Hung Ki,et al.  Single-inductor multiple-output switching converters , 2001, 2001 IEEE 32nd Annual Power Electronics Specialists Conference (IEEE Cat. No.01CH37230).

[5]  Marty Brown.  Practical Switching Power Supply Design , 1990 .

[6]  M.W. May,et al.  A synchronous dual-output switching dc-dc converter using multibit noise-shaped switch control , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

[7]  Chi-Ying Tsui,et al.  A 1.8 V single-inductor dual-output switching converter for power reduction techniques , 2001, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).

[8]  Slobodan Cuk,et al.  A general unified approach to modelling switching DC-tO-DC converters in discontinuous conduction mode , 1977, 1977 IEEE Power Electronics Specialists Conference.

[9]  J.G. Hayes,et al.  Current-fed multiple-output power conversion , 2004, Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04..