Complementary heterostructure FET technology for low power, high speed digital applications

Abstract A quantitative comparison is given between complementary heterostructure FET (CHFET) and silicon-on-insulator (SOI) complementary logic gates. Using the same power supply (1.3 V), the same gate length (0.7 μm), and the same gate capacitance for the transistors, it is shown that CHFET logic circuits are 2–3 times faster than SOI at the same power, even when driving long on-chip lines. The CHFET logic circuits are 4–9 times lower in power than SOI at the same frequency. The performance advantage of CHFET is due to the high electron velocity in the n-channel transistors. Experimental results of actual CHFET standard cells verify the claims. This paper also shows good agreement between actual CHFET logic performance and the predictions of a SPICE model.