Methods and tools for energy-aware System on Chip designs
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Energy efficiency is one of the most critical aspects of today's integrated circuits and systems. This is true not just for portable application, where low-power consumption translates into long battery lifetimes, but also for high performance mainframes, where contained power dissipation traduces into less generated heat, lower operating temperatures, thus higher reliability. The long term objective of the task DT2.2 is the development of new design methodologies for the design of reliable, low-power, energy efficient digital ICs. This document provides a summary of the main activities carried out by the task partners POLITO and ONSEMI-B till M24 and regarding the implementation of advanced low-power synthesis and validation flow for advanced CMOS circuits