Exploiting Weak PUFs From Data Converter Nonlinearity - E.g., A Multibit CT ΔΣ Modulator.
暂无分享,去创建一个
[1] Himanshu Kaul,et al. 16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).
[2] Mitsuru Matsui,et al. Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings , 2006, CHES.
[3] Ying Su,et al. A Digital 1.6 pJ/bit Chip Identification Circuit Using Process Variations , 2008, IEEE Journal of Solid-State Circuits.
[4] John G. Kauffman,et al. A 72 dB DR, CT ΔΣ Modulator Using Digitally Estimated, Auxiliary DAC Linearization Achieving 88 fJ/conv-step in a 25 MHz BW , 2014, IEEE Journal of Solid-State Circuits.
[5] Y. Manoli,et al. A Self Calibration Method for Fast, High Resolution A/D and D/A Converters , 1988, ESSCIRC '88: Fourteenth European Solid-State Circuits Conference.
[6] F. Borghetti,et al. On-line calibration and digital correction of multi-bit sigma-delta modulators , 2005, Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005..
[7] Ingrid Verbauwhede,et al. Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings , 2007, CHES.
[8] Ghyslain Gagnon,et al. Continuous Compensation of Binary-Weighted DAC Nonlinearities in Bandpass Delta-Sigma Modulators , 2007, 2007 IEEE International Symposium on Circuits and Systems.
[9] Martin Bossert,et al. On Error Correction for Physical Unclonable Functions , 2015, ArXiv.
[10] Jae-Yoon Sim,et al. A Digital-Domain Calibration of Split-Capacitor DAC for a Differential SAR ADC Without Additional Analog Circuits , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.
[11] Srinivas Devadas,et al. Physical Unclonable Functions and Applications: A Tutorial , 2014, Proceedings of the IEEE.
[12] Maurits Ortmanns,et al. Background DAC Error Estimation Using a Pseudo Random Noise Based Correlation Technique for Sigma-Delta Analog-to-Digital Converters , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.
[13] Roel Maes,et al. Physically Unclonable Functions , 2012, Springer Berlin Heidelberg.
[14] David Blaauw,et al. 14.2 A physically unclonable function with BER <10−8 for robust chip authentication using oscillator collapse in 40nm CMOS , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[15] Peter Simons,et al. Buskeeper PUFs, a promising alternative to D Flip-Flop PUFs , 2012, 2012 IEEE International Symposium on Hardware-Oriented Security and Trust.
[16] Massimo Alioto,et al. 14.3 15fJ/b static physically unclonable functions for secure chip identification with <2% native bit instability and 140× Inter/Intra PUF hamming distance separation in 65nm , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[17] A. Matsuzawa,et al. A 14-bit 100-MS/s digitally calibrated binary-weighted current-steering CMOS DAC without calibration ADC , 2007, 2007 IEEE Asian Solid-State Circuits Conference.
[18] Gabor C. Temes,et al. Understanding Delta-Sigma Data Converters , 2004 .
[19] John A. McNeill,et al. Digital background calibration of redundant split-flash ADC in 45nm CMOS , 2012, 2012 IEEE International Symposium on Circuits and Systems.
[20] Craig Petrie,et al. A background calibration technique for multibit delta-sigma modulators , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).
[21] G. Edward Suh,et al. Physical Unclonable Functions for Device Authentication and Secret Key Generation , 2007, 2007 44th ACM/IEEE Design Automation Conference.