A reconfigurable coprocessor units with redundant radix-4 arithmetic

Performance in many very-large-scale-integrated (VLSI) systems such as digital signal processing (DSP) chips, is predominantly determined by the speed of arithmetic modules like adders and multipliers. In recent times, designing coprocessors for fast arithmetic operation has become an important field of research. This paper implements a Reconfigurable Coprocessor for Redundant Radix-4 Arithmetic. In this coprocessor, we have implemented addition, subtraction, NAND, EXOR. In this paper, we have developed a complete set of Verilog modules, synthesized and implemented by targeting Altera Cyclone II FPGA.

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