A novel architecture for improving slew rate in FinFET-based op-amps and OTAs

A new architecture for improvement of slew rate (SR) of an op-amp or an operational transconductance amplifier (OTA) in FinFET technology is proposed. The principle of operation of the proposed architecture is based on a set of additional current sources which are switched on, only when OTA should provide a high current, usually for charge or discharge of large load capacitor. Therefore, the power overhead is less compared to conventional high SR designs. The commonly used two-stage Miller-compensated op-amp, designed and optimized in sub 45nm FinFET technology with 1V single supply voltage, is used as an example for demonstration of the proposed method. For the same FinFET technology and with optimal design, it is shown that the slew rate of the op-amp is significantly improved. The slew rate is improved from 273 to 5590V/@ms for an input signal with a rise time of 100ps. The other performance measures such as gain and phase margin remain unchanged with the additional circuitry used for slew rate enhancement.

[1]  Soon-Kyun Shin,et al.  A slew rate controlled output driver using PLL as compensation circuit , 2002, Proceedings of the 28th European Solid-State Circuits Conference.

[2]  Mohammed Ismail,et al.  High slew rate micro-power CMOS OTA with class AB input stage , 1997, Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg.

[3]  M. Shrivastava,et al.  A Novel and Robust Approach for Common Mode Feedback Using IDDG FinFET , 2008, IEEE Transactions on Electron Devices.

[4]  David Renshaw,et al.  IEEE International Symposium on Circuits and Systems (ISCAS) , 1990 .

[5]  J. Mavor,et al.  High slew rate CMOS operational amplifier employing internal transistor compensation , 1983 .

[6]  Yihe Sun,et al.  Digital 1 V 82 μW Pseudo-Two-Stage Class-AB OTA * , 2009 .

[7]  Yoon-Kyung Choi,et al.  Low-power class-AB CMOS OTA with high slew-rate , 2009, 2009 International SoC Design Conference (ISOCC).

[8]  A.J. Lopez-Martin,et al.  Low-Voltage Super class AB CMOS OTA cells with very high slew rate and power efficiency , 2005, IEEE Journal of Solid-State Circuits.

[9]  Robert Henderson,et al.  53RD IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS , 2010 .

[10]  F. Moraveji A wide-band, low-power, high slew rate voltage-feedback operational amplifier , 1996 .

[11]  Ramón González Carvajal,et al.  High slew rate two stage A/AB and AB/AB op-amps with phase lead compensation at output node and local common mode feedback , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[12]  Ramón González Carvajal,et al.  A new class AB differential input stage for implementation of low-voltage high slew rate op amps and linear transconductors , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[13]  R. Rooyackers,et al.  A Low-Power Multi-Gate FET CMOS Technology with 13.9ps Inverter Delay, Large-Scale Integrated High Performance Digital Circuits and SRAM , 2007, 2007 IEEE Symposium on VLSI Technology.

[14]  Khaled Hayatleh,et al.  A wide bandwidth voltage-follower with low distortion and high slew rate , 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.

[15]  Maryam Shojaei Baghini,et al.  A Novel Table-Based Approach for Design of FinFET Circuits , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[16]  M. B. Patil A new public-domain program for mixed-signal simulation , 2002, IEEE Trans. Educ..

[17]  Franco Maloberti,et al.  Slew-rate and gain enhancement in two stage operational amplifiers , 2009, 2009 IEEE International Symposium on Circuits and Systems.

[18]  Minkyu Song,et al.  A fast-transient over-sampled delta-sigma adaptive DC-DC converter for power-efficient noise-sensitive devices , 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).

[19]  Maryam Shojaei Baghini,et al.  Automated design and optimization of circuits in emerging technologies , 2009, 2009 Asia and South Pacific Design Automation Conference.

[20]  Gopal Krishna,et al.  A fast settling Slew Rate Enhancement technique for operational amplifiers , 2010, 2010 53rd IEEE International Midwest Symposium on Circuits and Systems.

[21]  Marc D. Rosales,et al.  Design and implementation of operational amplifiers with programmable characteristics in a 90nm CMOS process , 2009, 2009 European Conference on Circuit Theory and Design.

[22]  Jörg Henkel,et al.  Guest Editorial Special Section on Low-Power Electronics and Design , 2008, IEEE Trans. Very Large Scale Integr. Syst..

[23]  P. C. Subramaniam,et al.  High slew-rate CMOS operational amplifier , 2003 .