The Gamma network: A multiprocessor interconnection network with redundant paths

The Gamma network is an interconnection network connecting N&equil;2" inputs to N outputs. It consists of log2N stages with N switches per stage, each of which is a 3 input, 3 output crossbar. The stages are linked via “power of two” and identity connections in such a way that redundant paths exist between the input and output terminals. In this network, a path from a source to a destination may be represented using one of the redundant forms of the difference between the source and destination numbers. The redundancy in paths may thus be studied using the theory of redundant number systems. Results are obtained on the distribution of paths connecting inputs to outputs, and the permuting capabilities of the Gamma network. Switch settings for certain frequently used permutations and control mechanisms are also considered in this paper. This network has an interesting application in solving tridiagonal systems using the odd-even elimination algorithm.

[1]  Harold S. Stone,et al.  Parallel Processing with the Perfect Shuffle , 1971, IEEE Transactions on Computers.

[2]  Marshall C. Pease,et al.  The Indirect Binary n-Cube Microprocessor Array , 1977, IEEE Transactions on Computers.

[3]  Douglas Stott Parker,et al.  Notes on Shuffle/Exchange-Type Switching Networks , 1980, IEEE Transactions on Computers.

[4]  H. T. Kung,et al.  Systolic Arrays for (VLSI). , 1978 .

[5]  TOMAS LANG,et al.  A Shuffle-Exchange Network with Simplified Control , 1976, IEEE Transactions on Computers.

[6]  Tse-Yun Feng,et al.  Data Manipulating Functions in Parallel Processors and Their Implementations , 1974, IEEE Transactions on Computers.

[7]  A. Avizeinis,et al.  Signed Digit Number Representations for Fast Parallel Arithmetic , 1961 .

[8]  Robert J. McMillen,et al.  Use of the augmented data manipulator multistage network for simd machines , 1980 .

[9]  Robert J. McMillen,et al.  MIMD machine communication using the augmented data manipulator network , 1980, ISCA '80.

[10]  Howard Jay Siegel,et al.  Many SIMD interconnection networks have been proposed . To put the different approaches into perspective , this analysis compares a number of single-and multistage networks , 2022 .

[11]  Jacques Lenfant,et al.  Parallel Permutations of Data: A Benes Network Control Algorithm for Frequently Used Permutations , 1978, IEEE Transactions on Computers.

[12]  Duncan H. Lawrie,et al.  Access and Alignment of Data in an Array Processor , 1975, IEEE Transactions on Computers.