Different mechanism to explain the 1∕f noise in n- and p-SOI-MOS transistors fabricated on (110) and (100) silicon-oriented wafers

The investigation of the low frequency noise in p- and n-channel semiconductor-on-insulator–metal oxide semiconductor transistors fabricated on (100) and (110) silicon-oriented wafers using high advanced processes has been carried out. While for both orientations the 1∕f noise in the n-channel transistors can be explained through the ΔN formalism, the p-channel ones seem to follow the Hooge model. In addition, the new orientation presents a noise level higher than the conventional one. Furthermore, the authors showed that when there is a gap of one decade between the Si(100) and Si(110) p-channel transistors, this one has been reduced to a factor of 2 in the case of the n-channel ones. Finally, by combining the highly advanced microwave-excited high-density plasma oxidation process with the alkali-free five-step cleaning process, it has been possible to fabricate on both surfaces a very high quality oxide with a very low density of traps.

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