Reliability issues of NAND Flash memories

The continuous demand for NAND flash memories with higher performance and storage capabilities pushes the manufactures towards the limits of present technologies and to explore new solutions, both from the physical and the architectural point of view.

[1]  M. Lenzlinger,et al.  Fowler‐Nordheim Tunneling into Thermally Grown SiO2 , 1969 .

[2]  P. Kalavade,et al.  Flash EEPROM threshold instabilities due to charge trapping during program/erase cycling , 2004, IEEE Transactions on Device and Materials Reliability.

[3]  J. R. Shih,et al.  Using erase self-detrapped effect to eliminate the flash cell program/erase cycling V/sub th/ window close , 1999, 1999 IEEE International Reliability Physics Symposium Proceedings. 37th Annual (Cat. No.99CH36296).

[4]  Kinam Kim,et al.  Degradation of tunnel oxide by FN current stress and its effects on data retention characteristics of 90 nm NAND flash memory cells , 2003, 2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual..

[5]  Roberto Ravasio,et al.  Error Correction Codes for Non-Volatile Memories , 2008 .

[6]  A. Ghetti,et al.  A 65nm NOR flash technology with 0.042/spl mu/m/sup 2/ cell size for high performance multilevel application , 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

[7]  R. Bouchakour,et al.  Temperature and drain voltage dependence of gate-induced drain leakage , 2004 .

[8]  P. Olivo,et al.  Impact of high tunneling electric fields on erasing instabilities in NOR flash memories , 2006, IEEE Transactions on Electron Devices.

[9]  Daniele Ielmini,et al.  Recent developments on Flash memory reliability , 2005 .

[10]  Kazuo Yano,et al.  Single-electron memory for giga-to-tera bit storage , 1999, Proc. IEEE.

[11]  Fischetti.  Model for the generation of positive charge at the Si-SiO2 interface based on hot-hole injection from the anode. , 1985, Physical review. B, Condensed matter.

[12]  A. Visconti,et al.  Cycling Effect on the Random Telegraph Noise Instabilities of nor and nand Flash Arrays , 2008, IEEE Electron Device Letters.

[13]  Saibal Mukhopadhyay,et al.  Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits , 2003, Proc. IEEE.

[14]  Piero Olivo,et al.  Erratic Bits in Flash Memories under Fowler-Nordheim Programming , 2003 .

[15]  M. Momodomi,et al.  New ultra high density EPROM and flash EEPROM with NAND structure cell , 1987, 1987 International Electron Devices Meeting.

[16]  K. Otsuga,et al.  Random Telegraph Signal in Flash Memory: Its Impact on Scaling of Multilevel Flash Memory Beyond the 90-nm Node , 2007, IEEE Journal of Solid-State Circuits.

[17]  D. Bauza,et al.  Si-SiO2 interface trap capture properties , 2001 .

[18]  Piero Olivo,et al.  Constant charge erasing scheme for flash memories , 2002 .

[19]  Rino Micheloni,et al.  Non-Volatile Memories for Removable Media , 2009, Proceedings of the IEEE.

[20]  Shinji Miyamoto,et al.  A 120mm2 16Gb 4-MLC NAND Flash Memory with 43nm CMOS Technology , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[21]  R. Bez,et al.  What we have learned on flash memory reliability in the last ten years , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

[22]  Piyas Samanta,et al.  Calculation of the probability of hole injection from polysilicon gate into silicon dioxide in MOS structures under high-field stress , 1999 .

[23]  Byung-Gook Park,et al.  Dynamic bias temperature instability-like behaviors under Fowler–Nordheim program/erase stress in nanoscale silicon-oxide-nitride-oxide-silicon memories , 2008 .

[24]  C. Zambelli,et al.  A statistical model of erratic erase based on an automated random telegraph signal characterization technique , 2009, 2009 IEEE International Reliability Physics Symposium.

[25]  G. Ghibaudo,et al.  Impact of few electron phenomena on floating-gate memory reliability , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

[26]  D. Schroder,et al.  Degradation of thin tunnel gate oxide under constant Fowler-Nordheim current stress for a flash EEPROM , 1998 .

[27]  Piero Olivo,et al.  Overerase phenomena: an insight into flash memory reliability , 2003, Proc. IEEE.

[28]  R. Bez,et al.  Advanced flash memory reliability , 2004, 2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866).

[29]  Jae-Duk Lee,et al.  A New Programming Disturbance Phenomenon in NAND Flash Memory By Source/Drain Hot-Electrons Generated By GIDL Current , 2006, 2006 21st IEEE Non-Volatile Semiconductor Memory Workshop.

[30]  M.A. Alam,et al.  Investigation and modeling of interface and bulk trap generation during negative bias temperature instability of p-MOSFETs , 2004, IEEE Transactions on Electron Devices.

[31]  Carla Golla,et al.  Flash Memories , 1999 .

[32]  C.M. Compagnoni,et al.  Analytical Model for the Electron-Injection Statistics During Programming of Nanoscale nand Flash Memories , 2008, IEEE Transactions on Electron Devices.