Testable design of two-dimensional cellular logic arrays for detecting stuck-at and bridging faults
暂无分享,去创建一个
[1] Arthur D. Friedman. Diagnosis of Short-Circuit Faults in Combinational Circuits , 1974, IEEE Transactions on Computers.
[2] Robert C. Minnick. Cutpoint Cellular Logic , 1964, IEEE Trans. Electron. Comput..
[3] B. Bhattacharya,et al. Syndrome-testable logic design using DSTL arrays for detecting stuck-at and bridging faults , 1985 .
[4] Sudhakar M. Reddy,et al. Easily Testable Two-Dimensional Cellular Logic Arrays , 1974, IEEE Transactions on Computers.
[5] K. C. Y. Mei,et al. Bridging and Stuck-At Faults , 1974, IEEE Transactions on Computers.
[6] Sheldon B. Akers. A Rectangular Logic Array , 1972, IEEE Trans. Computers.
[7] Bidyut Gupta,et al. Logical Modeling of Physical Failures and Their Inherent Syndrome Testability in MOS LSI/VLSI Networks , 1984, ITC.