Towards Scenario-Based Synthesis for Parametric Timed Automata

A number of approaches exists that permit to synthesize the operational state-based behavior of a set of components for a set of scenarios. In this paper we explore how to extend these approaches to also tackle the problem for scenarios with parametric timing constraints in form of upper and lower time bounds. The resulting time consistency problems are identified and ideas for an algorithmic handling are presented.

[1]  Eduard Cerny,et al.  Semantics and verification of action diagrams with linear timing , 1998, TODE.

[2]  Sebastián Uchitel,et al.  A workbench for synthesising behaviour models from scenarios , 2001, Proceedings of the 23rd International Conference on Software Engineering. ICSE 2001.

[3]  Andy J. Wellings,et al.  A. framework for integrating the real-time specification for Java and Java's remote method invocation , 2002, Proceedings Fifth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing. ISIRC 2002.

[4]  Wang Yi,et al.  UPPAAL - a Tool Suite for Automatic Verification of Real-Time Systems , 1996, Hybrid Systems.

[5]  Hanêne Ben-Abdallah,et al.  Timing Constraints in Message Sequence Chart Specifications , 1997, FORTE.

[6]  Thomas A. Henzinger,et al.  Parametric real-time reasoning , 1993, STOC.

[7]  Thomas A. Henzinger,et al.  Symbolic Model Checking for Real-Time Systems , 1994, Inf. Comput..

[8]  Manfred Broy,et al.  From MSCs to Statecharts , 1998, DIPES.

[9]  Jean G. Vaucher,et al.  From scenarios to timed automata: building specifications from users requirements , 1995, Proceedings 1995 Asia Pacific Software Engineering Conference.