CPU dynamic thermal management via thermal spare cores

Adding Cores to CPU chip increases its power density and leads to thermal throttling due to cooling limitations. Thermal Spare Cores (TSC) is proposed as new technique for Dynamic Thermal Management (DTM). Our objective is to avoid thermal throttling and ensure stable CPU performance. Towards this objective, thermal model of IBM Power 4 CPU chip contains 8 Cores implemented as proof of concept. TSC higher potential expected with CUP chip having higher number of Cores under thermal constraints. In the near future we will be able to add dozens of Cores to CUP chip; while we will not be able to activate them all simultaneously due to air cooling limitations and thermal throttling.

[1]  Dean M. Tullsen,et al.  Interconnections in multi-core architectures: understanding mechanisms, overheads and scaling , 2005, 32nd International Symposium on Computer Architecture (ISCA'05).

[2]  Li Shang,et al.  Thermal crisis: challenges and potential solutions , 2006, IEEE Potentials.

[3]  Keith Diefendorff,et al.  Power4 focuses on memory bandwidth , 1999 .

[4]  Sarma B. K. Vrudhula,et al.  Performance optimal processor throttling under thermal constraints , 2007, CASES '07.

[5]  M. Kamoun,et al.  IDENTIFICATION OF NONLINEAR MULTIVARIABLE SYSTEMS BY ADAPTIVE FUZZY TAKAGI-SUGENO MODEL , 2003 .

[6]  Margaret Martonosi,et al.  Techniques for Multicore Thermal Management: Classification and New Exploration , 2006, ISCA 2006.

[7]  Kevin Skadron,et al.  HotSpot: a compact thermal modeling methodology for early-stage VLSI design , 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[8]  Sudipta K. Ray,et al.  An advanced multichip module (MCM) for high-performance UNIX servers , 2002, IBM J. Res. Dev..

[9]  Sung Woo Chung,et al.  Using On-Chip Event Counters For High-Resolution, Real-Time Temperature Measurement , 2006, Thermal and Thermomechanical Proceedings 10th Intersociety Conference on Phenomena in Electronics Systems, 2006. ITHERM 2006..

[10]  Kevin Skadron,et al.  Compact thermal modeling for temperature-aware design , 2004, Proceedings. 41st Design Automation Conference, 2004..

[11]  Kevin Skadron,et al.  HotSpot: a dynamic compact thermal model at the processor-architecture level , 2003, Microelectron. J..

[12]  Balaram Sinharoy,et al.  POWER4 system microarchitecture , 2002, IBM J. Res. Dev..

[13]  Grigorios Magklis,et al.  Understanding the Thermal Implications of , 2007 .

[14]  Daniel Mossé,et al.  Thermal Faults Modeling Using a RC Model with an Application to Web Farms , 2007, 19th Euromicro Conference on Real-Time Systems (ECRTS'07).