Substrate bias effects in SOI FinFETs

Double gate devices are promising candidates for the MOSFET scaling down to the deca-nanometer range. We discuss the performance of FinFETs in terms of transport properties and coupling effects. The structure of the devices and its peculiarities are first described. Based on experimental results, we analyze the coupling specificities of the lateral, front and back interfaces. The substrate bias influence on the front and lateral surface is especially emphasized. The transport properties on each interface are also presented and compared. Finally, the material quality of the silicon film is discussed using transient effect measurements.