COHRA: hardware-software cosynthesis of hierarchical heterogeneous distributed embedded systems

Hardware-software cosynthesis of an embedded system architecture entails partitioning of its specification into hardware and software modules such that its real-time and other constraints are met. Embedded systems are generally specified in terms of a set of acyclic task graphs. For medium- to large-scale embedded systems, the task graphs are usually hierarchical in nature. The embedded system architecture, which is the output of the cosynthesis system, may itself be nonhierarchical or hierarchical. Traditional nonhierarchical architectures create communication and processing bottlenecks and are impractical for large embedded systems. Such systems require a large number of processing elements and communication links connected in a hierarchical manner, thus forming a hierarchical distributed architecture, to meet performance and cost objectives. In this paper, we address the problem of hardware-software cosynthesis of hierarchical heterogeneous distributed embedded system architectures from hierarchical or nonhierarchical task graphs. Our cosynthesis algorithm has the following features: 1) it supports periodic task graphs with real-time constraints, 2) it supports pipelining of task graphs, 3) it supports a heterogeneous set of processing elements and communication links, 4) it allows both sequential and concurrent modes of communication and computation, 5) it employs a combination of preemptive and nonpreemptive static scheduling, 6) it employs a new task-clustering technique suitable for hierarchical task graphs, and 7) it uses the concept of association arrays to tackle the problem of multirate tasks encountered in multimedia systems. We show how our cosynthesis algorithm can be easily extended to consider fault tolerance or low-power objectives or both. Although hierarchical architectures have been proposed before, to the best of our knowledge, this is the first time the notion of hierarchical task graphs and hierarchical architectures has been supported in a cosynthesis algorithm.

[1]  Bill Lin,et al.  Embedded architecture co-synthesis and system integration , 1996 .

[2]  John P. Lehoczky,et al.  Algorithms for scheduling hard aperiodic tasks in fixed-priority systems using slack stealing , 1994, 1994 Proceedings Real-Time Systems Symposium.

[3]  Ti-Yen Yen,et al.  Sensitivity-driven co-synthesis of distributed embedded systems , 1995 .

[4]  Niraj K. Jha,et al.  Hardware-software co-synthesis of fault-tolerant real-time distributed embedded systems , 1995, Proceedings of EURO-DAC. European Design Automation Conference.

[5]  Marilyn Wolf,et al.  An architectural co-synthesis algorithm for distributed, embedded computing systems , 1997, IEEE Trans. Very Large Scale Integr. Syst..

[6]  Ishfaq Ahmad,et al.  Dynamic Critical-Path Scheduling: An Effective Technique for Allocating Task Graphs to Multiprocessors , 1996, IEEE Trans. Parallel Distributed Syst..

[7]  Niraj K. Jha,et al.  COHRA: hardware-software co-synthesis of hierarchical distributed embedded system architectures , 1998, Proceedings Eleventh International Conference on VLSI Design.

[8]  Edward A. Lee,et al.  A global criticality/local phase driven algorithm for the constrained hardware/software partitioning problem , 1994, Third International Workshop on Hardware/Software Codesign.

[9]  David S. Johnson,et al.  Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .

[10]  John P. Lehoczky,et al.  Rate-monotonic analysis for real-time industrial computing , 1994, Computer.

[11]  Niraj K. Jha,et al.  COFTA : Hardware-Software Co-Synthesis of Heterogeneous Distributed Embedded Systems for Low Overhead Fault Tolerance , 1999 .

[12]  John D. Musa,et al.  Software reliability measurement , 1984, J. Syst. Softw..

[13]  Wayne Wolf,et al.  Hardware-software co-design of embedded systems , 1994, Proc. IEEE.

[14]  Sharad Malik,et al.  Cinderella: A Retargetable Environment for Performance Analysis of Real-Time Software , 1997, Euro-Par.

[15]  Niraj K. Jha,et al.  COFTA: hardware-software co-synthesis of heterogeneous distributed embedded system architectures for low overhead fault tolerance , 1997, Proceedings of IEEE 27th International Symposium on Fault Tolerant Computing.

[16]  Hugo De Man,et al.  CoWare—A design environment for heterogeneous hardware/software systems , 1996, EURO-DAC '96/EURO-VHDL '96.

[17]  J.-P. Wang,et al.  Task Allocation for Maximizing Reliability of Distributed Computer Systems , 1992, IEEE Trans. Computers.

[18]  Wayne H. Wolf,et al.  Object-oriented cosynthesis of distributed embedded systems , 1996, TODE.

[19]  Jörg Henkel,et al.  Fast timing analysis for hardware-software co-synthesis , 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

[20]  Edward A. Lee,et al.  A Compile-Time Scheduling Heuristic for Interconnection-Constrained Heterogeneous Processor Architectures , 1993, IEEE Trans. Parallel Distributed Syst..

[21]  Alan Burns,et al.  Optimal Priority Assignment for Aperiodic Tasks with Firm Deadlines in Fixed Priority Pre-Emptive Systems , 1995, Inf. Process. Lett..

[22]  Jörg Henkel,et al.  Hardware-software cosynthesis for microcontrollers , 1993, IEEE Design & Test of Computers.

[23]  John D. Musa,et al.  Software reliability - measurement, prediction, application , 1987, McGraw-Hill series in software engineering and technology.

[24]  R.K. Gupta,et al.  Constrained software generation for hardware-software systems , 1994, Third International Workshop on Hardware/Software Codesign.

[25]  Charles U. Martel,et al.  Scheduling Periodically Occurring Tasks on Multiple Processors , 1981, Inf. Process. Lett..

[26]  Luciano Lavagno,et al.  Hardware-Software Co-Design of Embedded Systems , 1997 .

[27]  Dirk Herrmann,et al.  An approach to the adaptation of estimated cost parameters in the COSYMA system , 1994, Third International Workshop on Hardware/Software Codesign.

[28]  Mani B. Srivastava,et al.  SIERA: a unified framework for rapid-prototyping of system-level hardware and software , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[29]  Giovanni De Micheli,et al.  Program implementation schemes for hardware-software systems , 1994, Computer.

[30]  Lui Sha,et al.  Exploiting unused periodic time for aperiodic service using the extended priority exchange algorithm , 1988, Proceedings. Real-Time Systems Symposium.

[31]  Edward A. Lee,et al.  A hardware-software codesign methodology for DSP applications , 1993, IEEE Design & Test of Computers.

[32]  Alice C. Parker,et al.  SOS: Synthesis of application-specific heterogeneous multiprocessor systems , 2001, J. Parallel Distributed Comput..

[33]  John P. Lehoczky,et al.  An optimal algorithm for scheduling soft-aperiodic tasks in fixed-priority preemptive systems , 1992, [1992] Proceedings Real-Time Systems Symposium.

[34]  Xiaobo Hu,et al.  Configuration-level hardware/software partitioning for real-time embedded systems , 1994, Third International Workshop on Hardware/Software Codesign.

[35]  Krithi Ramamritham,et al.  Efficient Scheduling Algorithms for Real-Time Multiprocessor Systems , 1989, IEEE Trans. Parallel Distributed Syst..

[36]  John P. Lehoczky,et al.  On-line scheduling of hard deadline aperiodic tasks in fixed-priority systems , 1993, 1993 Proceedings Real-Time Systems Symposium.

[37]  Charles U. Martel,et al.  On non-preemptive scheduling of period and sporadic tasks , 1991, [1991] Proceedings Twelfth Real-Time Systems Symposium.

[38]  Axel Jantsch,et al.  Hardware/software partitioning and minimizing memory interface traffic , 1994, EURO-DAC '94.

[39]  Alan Burns,et al.  Scheduling slack time in fixed priority pre-emptive systems , 1993, 1993 Proceedings Real-Time Systems Symposium.

[40]  Kang G. Shin,et al.  Load sharing with consideration of future task arrivals in heterogeneous distributed real-time systems , 1991, [1991] Proceedings Twelfth Real-Time Systems Symposium.

[41]  Christoph M. Hoffmann,et al.  Group-Theoretic Algorithms and Graph Isomorphism , 1982, Lecture Notes in Computer Science.

[42]  Krithi Ramamritham,et al.  Scheduling algorithms and operating systems support for real-time systems , 1994, Proc. IEEE.

[43]  Andrew Wolfe,et al.  TigerSwitch: a case study in embedded computing system design , 1994, Third International Workshop on Hardware/Software Codesign.

[44]  Ramesh Karri,et al.  Optimal algorithms for synthesis of reliable application-specific heterogeneous multiprocessors , 1995 .

[45]  Ing-Jer Huang,et al.  Synthesis of application specific instruction sets , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[46]  Andrew Wolfe,et al.  Compilation techniques for low energy: an overview , 1994, Proceedings of 1994 IEEE Symposium on Low Power Electronics.

[47]  Frank Vahid,et al.  A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning , 1994, EURO-DAC '94.

[48]  Niraj K. Jha,et al.  COSYN: hardware-software co-synthesis of embedded systems , 1997, DAC.

[49]  Ing-Jer Huang,et al.  Synthesis and analysis of an industrial embedded microcontroller , 1997, Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference.

[50]  Yacine Atif,et al.  Dynamic scheduling of real-time aperiodic tasks on multiprocessor architectures , 1996, Proceedings of HICSS-29: 29th Hawaii International Conference on System Sciences.

[51]  Vincenzo Piuri,et al.  Hill-climbing heuristics for optimal hardware dimensioning and software allocation in fault-tolerant distributed systems , 1989 .

[52]  Wayne Wolf,et al.  Hardware-Software Co-Synthesis of Distributed Embedded Systems , 1996 .

[53]  Wayne Wolf,et al.  Communication synthesis for distributed embedded systems , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[54]  Jörg Henkel,et al.  A hardware/software partitioner using a dynamically determined granularity , 1997, DAC.

[55]  Donatella Sciuto,et al.  The role of VHDL within the TOSCA hardware/software codesign framework , 1994, EURO-DAC '94.

[56]  Wayne Wolf,et al.  Process partitioning for distributed embedded systems , 1996, Proceedings of 4th International Workshop on Hardware/Software Co-Design. Codes/CASHE '96.

[57]  Miodrag Potkonjak,et al.  System-level synthesis of low-power hard real-time systems , 1997, DAC.

[58]  D. Corneil,et al.  An Efficient Algorithm for Graph Isomorphism , 1970, JACM.

[59]  Wayne H. Wolf,et al.  Performance estimation for real-time distributed embedded systems , 1995, Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors.

[60]  Wolfgang Rosenstiel,et al.  A method for partitioning UNITY language in hardware and software , 1994, EURO-DAC '94.

[61]  Donald E. Thomas,et al.  Architectural partitioning for system level synthesis of integrated circuits , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[62]  Kang G. Shin,et al.  Allocation of periodic task modules with precedence and deadline constraints in distributed real-time systems , 1992, [1992] Proceedings Real-Time Systems Symposium.

[63]  Frank Vahid,et al.  SpecCharts: a VHDL front-end for embedded systems , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[64]  Salim Hariri,et al.  Architectural support for designing fault-tolerant open distributed systems , 1992, Computer.

[65]  Rudy Lauwereins,et al.  Hardware-software codesign with GRAPE , 1995, Proceedings Sixth IEEE International Workshop on Rapid System Prototyping. Shortening the Path from Specification to Prototype.

[66]  Niraj K. Jha,et al.  CASPER: Concurrent hardware-software co-synthesis of hard real-time aperiodic and periodic specifications of embedded system architectures , 1998, Proceedings Design, Automation and Test in Europe.