A new implementation methodology for a secure distance bounding protocol

In this paper, the RFID distance bounding protocol proposed by Hancke and Kuhn has been implemented on an FPGA. In this protocol, round/trip delay of the electromagnetic wave is calculated by the reader in order to determine the distance between the tag and the reader. The reader authenticates the tag that is located not more than a specified distance from it. The protocol has been implemented on a Digilent Spartan 3E FPGA kit. Verilog HDL is used to describe the protocol.

[1]  Gerhard P. Hancke,et al.  Design of a secure distance-bounding channel for RFID , 2011, J. Netw. Comput. Appl..

[2]  David Chaum,et al.  Distance-Bounding Protocols (Extended Abstract) , 1994, EUROCRYPT.

[3]  Dennis Brown RFID Implementation , 2006 .

[4]  Jan M. Rabaey,et al.  Digital Integrated Circuits , 2003 .

[5]  Srdjan Capkun,et al.  Realization of RF Distance Bounding , 2010, USENIX Security Symposium.

[6]  Michael D. Ciletti,et al.  Advanced Digital Design with the Verilog HDL , 2010 .

[7]  Thomas H. Lee,et al.  The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES , 2003 .

[8]  Jean P. Mermet,et al.  Fundamentals and standards in hardware description languages , 1993 .

[9]  Peter J. Ashenden,et al.  The Designer's Guide to VHDL , 1995 .

[10]  Markus G. Kuhn,et al.  An RFID Distance Bounding Protocol , 2005, First International Conference on Security and Privacy for Emerging Areas in Communications Networks (SECURECOMM'05).