Symbolic Model Checking withRich

The paper shows that, by an appropriate choice of a rich assertional language, it is possible to extend the utility of symbolic model checking beyond the realm of bdd-represented nite-state systems into the domain of innnite-state systems, leading to a powerful technique for uniform veriication of unbounded (parameterized) process networks. The main contributions of the paper are a formulation of a general framework for symbolic model checking of innnite-state systems, a demonstration that many individual examples of uniformly veriied parameterized designs that appear in the literature are special cases of our general approach, verifying the correctness of the Futurebus+ design for all single-bus conngurations, and extending the technique to tree architectures.

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