论文信息 - A novel voltage reference with an improved folded cascode current mirror OpAmp dedicated for energy harvesting application

A novel voltage reference with an improved folded cascode current mirror OpAmp dedicated for energy harvesting application

In this paper, a CMOS ultra-low voltage reference circuit with ultra-low power consumption of 220nW is proposed. The circuit, simulated in 65nm standard CMOS process technology, operates with a supply voltage of 1V. It is based on sub-threshold MOSFETs using the technique of compensating a PTAT-based variable with the gate source voltage of a sub-threshold MOSFET. The novelty of circuit is the use of an improved folded cascode current mirror op-amp operating directly from a 1V power supply. The resulting voltage is equal to the extrapolated threshold voltage of a MOSFET at absolute zero temperature, which was about 435mV for the MOSFETs used. The proposed circuit achieves an average temperature coefficient of 30ppm/°C, 12ppm/V in line regulation for a supply voltage range of 0.6-1.2V, and a power supply rejection ratio (PSRR) of -38dB at 100Hz. The overall power consumption is only 220nW.

[1] K. Leung,et al. A CMOS voltage reference based on weighted difference of gate-source voltages between PMOS and NMOS transistors for low dropout regulators , 2001, Proceedings of the 27th European Solid-State Circuits Conference.

[2] C. Popa. A new curvature-corrected voltage reference based on the weight difference of gate-source voltages for subthreshold-operated MOS transistors , 2003, Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on.

[3] G. Palumbo,et al. A low-voltage low-power voltage reference based on subthreshold MOSFETs , 2003, IEEE J. Solid State Circuits.

[4] C. Himes,et al. Ultralow Voltage Nanoelectronics Powered Directly, and Solely, From a Tree , 2010, IEEE Transactions on Nanotechnology.

[5] Kai Strunz,et al. A 20 mV Input Boost Converter With Efficient Digital Control for Thermoelectric Energy Harvesting , 2010, IEEE Journal of Solid-State Circuits.

[6] SeongHwan Cho,et al. A 210 nW 29.3 ppm/°C 0.7 V voltage reference with a temperature range of −50 to 130 °C in 0.13 µm CMOS , 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.

[7] Ralf Brederlow,et al. An Ultra Low Power Bandgap Operational at Supply From 0.75 V , 2012, IEEE Journal of Solid-State Circuits.

[8] Nobutaka Kuroki,et al. 1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs , 2013, IEEE Journal of Solid-State Circuits.