A 3.6 Gb/s 60 mW 4:1 multiplexer in 0.35-µm CMOS

A tree-type 4:1 multiplexer (MUX) is designed by employing CMOS logic and eliminating impedance matching of the signal ports. The proposed circuit is realized in a 0.35-µm CMOS process. With the whole power consumption of 60 mW from a 3.3 V supply voltage, the MUX can operate at an output rate up to 3.6 Gb/s. From the measured eye-diagrams, the MUX exhibits an output voltage swing of 250 mVpp with 50 Ω load(single-ended).

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