Photoelectrochemical (PEC) etching of III-V semiconductors has been used to fabricate unique structures in electronic and photonic devices, such as integral lenses on light-emitting diodes, gratings on laser structures, and through-wafer via connections in field-effect transistors. The advantages and characteristics of PEC etching are reviewed, and the extension of this processing technique to silicon is addressed. Three-dimensional structures are of great interest in silicon for electronic and micromechanical devices. Silicon is a challenging material to PEC-etch because the oxides formed during etching inhibit the dissolution rate and decrease the spatial resolution. In addition, the long carrier lifetime permits holes to react at unilluminated sites. Nonaqueous solvents provide a processing environment where oxides do not interfere with the spatial resolution and free fluoride is no longer needed in the dissolution of silicon.
[1]
R. W. Hoisty.
Photoetching and Plating of Gallium Arsenide
,
1961
.
[2]
S. Morrison.
Electrochemistry at Semiconductor and Oxidized Metal Electrodes
,
1980
.
[3]
Y. Pleskov,et al.
THE ELECTROCHEMISTRY OF SEMICONDUCTORS
,
1963
.
[4]
S. Sriram,et al.
Integrated Optical Circuit Engineering
,
1985
.
[5]
V. M. Donnelly,et al.
Photon, beam, and plasma stimulated chemical processes at surfaces : symposium held December 1-4, 1986, Boston, Massachusetts, U.S.A.
,
1987
.
[6]
R. D. Standley,et al.
Integrated optical circuits
,
1970
.
[7]
F. Kuhn-Kuhnenfeld.
Selective Photoetching of Gallium Arsenide
,
1972
.
[8]
D. Lubzens.
Photoetching of InP mesas for production of mm-wave transferred-electron oscillators
,
1977
.