Interpolated timing recovery for hard disk drive read channels

We propose an architecture for hard disk drive read channels in which the signal from the read head is asynchronously sampled at a frequency slightly higher than the channel bit rate. Synchronous samples are subsequently computed by interpolation, and used by a conventional sequence detector such as a Viterbi detector for partial response. This architecture allows design of a fully digital PLL, including a digital ZPR function. In addition, the latencies of the ADC and FIR equalization filter do not contribute to loop delay. A cost effective, well performing implementation is described.