Encoding Symbolic Inputs for Multi-Level Logic Implementation

This paper presents an approach for symbolic minimization of combinational logic to be implemented in multi-level form. We consider the problem of finding optimal binary encodings for the different values of a symbolic input variable. An optimal encoding is one that leads to a minimal multi-level implementation of the resulting Boolean logic. Our approach is based on finding encodings that resultin large common divisors among a set of expressions. We develop a theoretical foundation that permit* us to view all possiblecommon algebraic divisors resulting from all possible encodings of the symbolic variable. We determine necessary and sufficient conditions that the encoding must satisfy for a given common divisor to exist in an encoded implementation. Determining the encoding that results in large common divisors is shown to be equivalent to solving a face embedding problem, for which efficient heuristics exist. We increase the powerof our approach by extending it to detect non-algebraic (Boolean) divisors. An interesting aspect is that an initial multi-level decomposition is produced as a by-product of the encoding process.

[1]  Sabrina Hirsch,et al.  Logic Minimization Algorithms For Vlsi Synthesis , 2016 .

[2]  Gary D. Hachtel,et al.  BOLD: The Boulder Optimal Logic Design system , 1989, [1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track.

[3]  Alberto L. Sangiovanni-Vincentelli,et al.  MUSTANG: state assignment of finite state machines targeting multilevel logic implementations , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  Robert K. Brayton,et al.  MIS: A Multiple-Level Logic Optimization System , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[5]  Alberto L. Sangiovanni-Vincentelli,et al.  Multiple-Valued Minimization for PLA Optimization , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  T. Villa Constrained encoding in hypercubes: algorithms and applications tological synthesis , 1987 .

[7]  D. Gregory,et al.  SOCRATES: A System for Automatically Synthesizing and Optimizing Combinational Logic , 1986, 23rd ACM/IEEE Design Automation Conference.

[8]  G. De Micheli Symbolic Design of Combinational and Sequential Logic Circuits Implemented by Two-Level Logic Macros , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  Robert K. Brayton,et al.  Optimal State Assignment for Finite State Machines , 1985, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.