An Improved Quasi-Saturation and Charge Model for SOI-LDMOS Transistors
暂无分享,去创建一个
Anjan Chakravorty | Amitava DasGupta | Nitin Prasad | Nandita DasGupta | Prasad Sarangapani | Krishnan Nadar Savithry Nikhil
[1] Colin C. McAndrew,et al. Robust Parameter Extraction for the R3 Nonlinear Resistor Model for Diffused and Poly Resistors , 2012, IEEE Transactions on Semiconductor Manufacturing.
[2] G.J. Coram,et al. How to (and how not to) write a compact model in Verilog-A , 2004, Proceedings of the 2004 IEEE International Behavioral Modeling and Simulation Conference, 2004. BMAS 2004..
[3] Anjan Chakravorty,et al. Compact modeling of SOI-LDMOS including quasi-saturation effect , 2009, 2009 2nd International Workshop on Electron Devices and Semiconductor Technology.
[4] A.S. Roy,et al. Source–Drain Partitioning in MOSFET , 2007, IEEE Transactions on Electron Devices.
[5] Soo-Young Oh,et al. Transient analysis of MOS transistors , 1980 .
[6] Weifeng Sun,et al. A Novel Compact High-Voltage LDMOS Transistor Model for Circuit Simulation , 2013, IEEE Transactions on Electron Devices.
[7] Shih Wei Sun,et al. Integration of power LDMOS into a low-voltage 0.5 mu m BiCMOS technology , 1992, 1992 International Technical Digest on Electron Devices Meeting.
[8] U. Radhakrishna,et al. Modeling of SOI-LDMOS Transistor Including Impact Ionization, Snapback, and Self-Heating , 2011, IEEE Transactions on Electron Devices.
[9] R. E. Thomas,et al. Carrier mobilities in silicon empirically related to doping and field , 1967 .
[10] Colin C. McAndrew,et al. Integrated Resistor Modeling , 2010 .
[11] G. Gildenblat,et al. Benchmark Tests for MOSFET Compact Models With Application to the PSP Model , 2009, IEEE Transactions on Electron Devices.
[12] H.J. Mattausch,et al. HiSIM-HV: A compact model for simulation of high-voltage-MOSFET circuits , 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.
[13] C. McAndrew,et al. SP-HV: A Scalable Surface-Potential-Based Compact Model for LDMOS Transistors , 2012, IEEE Transactions on Electron Devices.
[14] R. van Langevelde,et al. A surface-potential-based high-voltage compact LDMOS transistor model , 2005, IEEE Transactions on Electron Devices.
[15] D.B.M. Klaassen,et al. Capacitance modeling of laterally non-uniform MOS devices , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[16] A.C.T. Aarts,et al. Compact modeling of high-voltage LDMOS devices including quasi-saturation , 2006, IEEE Transactions on Electron Devices.
[17] D.B.M. Klaassen,et al. New fundamental insights into capacitance modeling of laterally nonuniform MOS devices , 2006, IEEE Transactions on Electron Devices.
[18] Mitiko Miura-Mattausch,et al. Quasi-2-Dimensional Compact Resistor Model for the Drift Region in High-Voltage LDMOS Devices , 2011, IEEE Transactions on Electron Devices.
[19] P.M. Holland,et al. An Alternative Process Architecture for CMOS Based High Side RESURF LDMOS Transistors , 2006, 2006 25th International Conference on Microelectronics.
[20] Xuemei Xi,et al. An Accurate and Robust Compact Model for High-Voltage MOS IC Simulation , 2013, IEEE Transactions on Electron Devices.
[21] Act Annemarie Aarts,et al. MM20 HVMOS Model: A Surface-Potential-Based LDMOS Model for Circuit Simulation , 2010 .
[22] C. McAndrew,et al. Compact Model of Impact Ionization in LDMOS Transistors , 2012, IEEE Transactions on Electron Devices.
[23] R.W. Dutton,et al. A charge-oriented model for MOS transistor capacitances , 1978, IEEE Journal of Solid-State Circuits.