Satellite communication transmission data processor and control method therefor

PURPOSE: A satellite communication transmission data processor and a control method therefor are provided to convert a user traffic, control/management information, signaling information, and resource assignment information composed in an Ethernet frame into a packet suitable for satellite environment, and offer a wideband satellite multimedia service. CONSTITUTION: A PCI(Programmable Communication Interface)(210) converts a bus signal of a CPU board(100) into a local data/address bus signal of a PMC(PCI Mezzanine Card) board. A CAM(220) stores an IP(Internet Protocol) address and a MAC(Media Access Control) address. A FIFO(230) temporarily stores traffic or signaling data outputted from the CPU board(100), and outputs the stored traffic or signaling data by an output byte clock. A PCG(Programmable Clock Generator)(240) generates a reference clock used in a transmission data processor and a timing signal provided to the outside. An FPGA(Field Programmable Gateway Array)(250) controls the CAM(220), the FIFO(230), the PCG(240), and the PCI(210).