Systematic top-down design of A/D converters
暂无分享,去创建一个
[1] Georges G. E. Gielen,et al. Architectural selection of A/D converters , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[2] Michiel Steyaert,et al. Speed-power-accuracy tradeoff in high-speed CMOS ADCs , 2002 .
[3] Guido Stehr,et al. Performance trade-off analysis of analog circuits by normal-boundary intersection , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[4] K. Philips,et al. A 3.3mW /spl Sigma//spl Delta/ modulator for UMTS in 0.18/spl mu/m CMOS with 70dB dynamic range in 2MHz bandwidth , 2002 .
[5] Georges G. E. Gielen,et al. An analytical integration method for the simulation of continuous-time /spl Delta//spl Sigma/ modulators , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[6] Edoardo Charbon,et al. A Top-down, Constraint-Driven Design Methodology for Analog Integrated Circuits , 1993 .