Power consumption optimization methodology (PCOM) for low-power/ low-voltage 32-bit microprocessor circuit design via MTCMOS

This paper presents a power consumption optimization methodology (PCOM) for low-power/ low-voltage single-cycle microprocessor circuit design via multi-threshold CMOS (MTCMOS) techniques. Based on the optimization methodology with the dual-threshold techniques, a 32-bit single-cycle MIPS microprocessor design has been optimized in terms of circuit design using dual-threshold HVT/SVT CMOS devices. According to SPICE simulation results, the power consumption of the 80,000-transistor 32-bit MIPS microprocessor, using a 90nm CMOS technology and operating at 1V with a 0.9-ns clock period, based on the optimization methodology with the dual-threshold technique, has been reduced by 27.23% during the standby period and 12.53% during the dynamic switching period as compared to the one using the conventional standard-threshold SVT CMOS devices.