Design Tools for Intelligent Silicon Compilation
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[1] Fadi J. Kurdahi,et al. A General Methodology for Synthesis and Verification of Register-Transfer Designs , 1984, 21st Design Automation Conference Proceedings.
[2] Donald E. Thomas,et al. A Method of Automatic Data Path Synthesis , 1983, 20th Design Automation Conference Proceedings.
[3] Donald E. Thomas,et al. Automatic Data Path Synthesis , 1983, Computer.
[4] P. W. Kollaritsch,et al. TOPOLOGIZER: An Expert System Translator of Transistor Connectivity to Symbolic Cell Layout , 1984, ESSCIRC '84: Tenth European Solid-State Circuits Conference.
[5] Mario Barbacci,et al. Instruction set processor specifications (ISPS): The notation and its applications , 1981, IEEE Transactions on Computers.
[6] Jay R. Southard,et al. MacPitts: An Approach to Silicon Compilation , 1983, Computer.
[7] Bruce D. Shriver,et al. Local Microcode Compaction Techniques , 1980, CSUR.
[8] Ahmed Amine Jerraya,et al. Principles of the SYCO Compiler , 1986, DAC 1986.
[9] Daniel P. Siewiorek,et al. The CMU Design Automation System - An Example of Automated Data Path Design , 1979, 16th Design Automation Conference.
[10] Donald E. Thomas,et al. The VLSI Design Automation Assistant: What's in a Knowledge Base , 1985, DAC 1985.
[11] Stephen S. Yau,et al. On storage optimization of horizontal microprograms , 1974, MICRO 7.
[12] Alice C. Parker,et al. MAHA: A Program for Datapath Synthesis , 1986, DAC 1986.
[13] Daniel P. Siewiorek,et al. Automated Synthesis of Data Paths in Digital Systems , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[14] D.D. Gajski,et al. An Expert-System Paradigm for Design , 1986, 23rd ACM/IEEE Design Automation Conference.
[15] Dave Johannsen,et al. Bristle Blocks: A Silicon Compiler , 1979, 16th Design Automation Conference.
[16] W. Fichtner,et al. The VLSI Design Automation Assistant: From Algorithms to Silicon , 1985, IEEE Design & Test of Computers.
[17] D.E. Thomas. The automatic synthesis of digital systems , 1981, Proceedings of the IEEE.
[18] Alice C. Parker,et al. A Formal Method for the Specification, Analysis, and Design of Register-Transfer Level Digital Logic , 1983, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[19] Daniel Gajski,et al. LES: A Layout Expert System , 1987, 24th ACM/IEEE Design Automation Conference.
[20] Jeffrey D. Ullman,et al. Polynomial complete scheduling problems , 1973, SOSP '73.