The Semiconductor Research Corporation: Cooperative research

The SRC (Semiconductor Research Corporation) was formed in 1982 to conduct generic, cooperative university research in the field of integrated circuits. An overview is provided of the methodologies used by the SRC for the identification of pacing integrated-circuit technologies, for research program planning and management, and for the transfer of research results to members. Several case studies are developed that illustrate the SRC approach to the conduct of research and that give a perspective on the broad spectrum of research results being produced. The SRC has found that the process of defining generic research goals, followed by the development and implementation of research plans to achieve the stated goals, provides effective focus and metrics for measuring research progress. It is the SRC's experience that focused university research can provide substantial contributions to the advancement of semiconductor technology as well as an additional work force to enhance the industry, university, and government technical infrastructure of the United States. >

[1]  John L. Prince,et al.  Design and Performance of a System for VLSI Packaging Thermal Modeling and Characterization , 1987 .

[2]  Donald E. Thomas,et al.  A Method of Automatic Data Path Synthesis , 1983, 20th Design Automation Conference Proceedings.

[3]  N. Goldsman,et al.  Tradeoffs and electron temperature calculations in lightly doped drain structures , 1985, IEEE Electron Device Letters.

[4]  Alberto L. Sangiovanni-Vincentelli,et al.  Multiple Constrained Folding of Programmable Logic Arrays: Theory and Applications , 1983, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[5]  Gerold W. Neudeck,et al.  A novel quasi-dielectrically isolated bipolar transistor using epitaxial lateral overgrowth , 1988, Proceedings of the 1988 Bipolar Circuits and Technology Meeting,.

[6]  J. C. Liao,et al.  Electrical Modeling of Interconnections in Multilayer Packaging Structures , 1987 .

[7]  C. Sah,et al.  Hydrogenation kinetics in oxidized boron‐doped silicon irradiated by keV electrons , 1988 .

[8]  Andrew R. Neureuther,et al.  Simulated profiles from the layout-design interface in X (SIMPL-DIX) , 1988, Technical Digest., International Electron Devices Meeting.

[9]  K.D. Wise,et al.  Scaling limits in batch-fabricated silicon pressure sensors , 1987, IEEE Transactions on Electron Devices.

[10]  K. Seki,et al.  Circuit aging simulator (CAS) , 1988, Technical Digest., International Electron Devices Meeting.

[11]  P. Sutardja,et al.  Modeling of stress-effects in silicon oxidation including the non-linear viscosity of oxide , 1987, 1987 International Electron Devices Meeting.

[12]  Donald E. Thomas,et al.  Synthesis by Delayed Binding of Decisions , 1985, DAC 1985.

[13]  C.V. Thompson,et al.  A new electromigration testing technique for rapid statistical evaluation of interconnect technology , 1986, IEEE Electron Device Letters.

[14]  J. L. Prince,et al.  Experimental thermal characterization of VLSI packages , 1988, Fourth Annual IEEE Semiconductor Thermal and Temperature Measurement Symposium.

[15]  Donald E. Thomas,et al.  CORAL II: linking behavior and structure in an IC design system , 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..

[16]  Kensall D. Wise,et al.  A thin-film gas detector for semiconductor process gases , 1988, Technical Digest., International Electron Devices Meeting.

[17]  N. Goldsman,et al.  Efficient and accurate use of the energy transport method in device simulation , 1988 .

[18]  Jeong Yeol Choi,et al.  Simulation of MOSFET lifetime under AC hot-electron stress , 1988 .

[19]  Robert K. Brayton,et al.  MIS: A Multiple-Level Logic Optimization System , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[20]  A. J. Strojwas The process engineer's workbench , 1988 .

[21]  Chenming Hu,et al.  Hot-electron-induced MOSFET degradation—Model, monitor, and improvement , 1985, IEEE Transactions on Electron Devices.

[22]  K. Wise,et al.  A silicon-thermopile-based infrared sensing array for use in automated manufacturing , 1986, IEEE Transactions on Electron Devices.

[23]  Rajiv Jain,et al.  Predicting Area-Time Tradeoffs for Pipelined Design , 1987, 24th ACM/IEEE Design Automation Conference.

[24]  Steven G. Duvall,et al.  An interchange format for process and device simulation , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[25]  Donald E. Thomas,et al.  The system architect's workbench , 1988, DAC '88.

[26]  R. C. Taft,et al.  Fabrication of p-channel BICFET in the Ge/sub x/Si/sub 1-x//Si system , 1988, Technical Digest., International Electron Devices Meeting.

[27]  A. Peczalski,et al.  Analysis of noise margin and speed of GaAs MESFET DCFL using UM-SPICE , 1986, IEEE Transactions on Electron Devices.

[28]  Alice C. Parker,et al.  The ADAM Advanced Design Automation System: Overview, Planner and Natural Language Interface , 1985, DAC 1985.

[29]  R. Fabian Pease,et al.  Modeling of laser planarization of thin metal films , 1989 .

[30]  P. Carey,et al.  Fabrication of submicrometer MOSFET's using gas immersion laser doping (GILD) , 1986, IEEE Electron Device Letters.

[31]  Michael L. Bushnell VLSI CAD Tool Integration Using the Ulysses Environment , 1986, DAC 1986.

[32]  Mauricio G. C. Resende,et al.  Closed-loop job release control for VLSI circuit manufacturing , 1988 .

[33]  Yoshio Nishi,et al.  Simulation and measurement of picosecond step responses in VLSI interconnections , 1988, Technical Digest., International Electron Devices Meeting.

[34]  Mario Barbacci,et al.  Instruction set processor specifications (ISPS): The notation and its applications , 1981, IEEE Transactions on Computers.

[35]  N. Goldsman,et al.  Electron energy distribution for calculation of gate leakage current in MOSFETs , 1988 .

[36]  Thomas Kwok,et al.  Molecular-dynamics studies of grain-boundary diffusion. I. Structural properties and mobility of point defects , 1984 .

[37]  Rajiv Jain,et al.  Area-time model for synthesis of non-pipelined designs , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[38]  W. Lynch,et al.  Self-aligned contact schemes for source-drains in submicron devices , 1987, 1987 International Electron Devices Meeting.

[39]  M. Elta,et al.  Large‐signal time‐domain modeling of low‐pressure rf glow discharges , 1987 .

[40]  M. Elta,et al.  A staggered-mesh finite-difference numerical method for solving the transport equations in low pressure RF glow discharges , 1988 .

[41]  S.W. Director,et al.  VLSI: linking design and manufacturing , 1988, IEEE Spectrum.

[42]  Sani R. Nassif,et al.  FABRICS II: A Statistically Based IC Fabrication Process Simulator , 1984, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.