Electromigration- and Parasitic-Aware ILP-Based Analog Router
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[1] Malgorzata Marek-Sadowska,et al. A Method for Improving Power Grid Resilience to Electromigration-Caused via Failures , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[2] Nuno Horta,et al. Electromigration-aware analog Router with multilayer multiport terminal structures , 2014, Integr..
[3] Yi-Lung Cheng,et al. Back stress model on electromigration lifetime prediction in short length copper interconnects , 2008, 2008 IEEE International Reliability Physics Symposium.
[4] Günhan Dündar,et al. Analog Layout Generator for CMOS Circuits , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[5] Zheng Liu,et al. A performance-constrained template-based layout retargeting algorithm for analog integrated circuits , 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).
[6] Iris Hui-Ru Jiang,et al. WiT: Optimal Wiring Topology for Electromigration Avoidance , 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[7] Lorenz T. Biegler,et al. On the implementation of an interior-point filter line-search algorithm for large-scale nonlinear programming , 2006, Math. Program..
[8] Howard M. Heys,et al. Analytic modeling of interconnect capacitance in submicron and nanometer technologies , 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).
[9] Lihong Zhang. VLSI Circuit Layout , 2008, Wiley Encyclopedia of Computer Science and Engineering.
[10] Sergio Gómez,et al. A Boolean Rule-Based Approach for Manufacturability-Aware Cell Routing , 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[11] Chris C. N. Chu,et al. FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[12] G. Micolau,et al. Current density aware algorithm for net generation in analog high current application , 2012, 2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).
[13] Qiang Gao,et al. LEMAR: A novel length matching routing algorithm for analog and mixed signal circuits , 2012, 17th Asia and South Pacific Design Automation Conference.
[14] Muhammet Mustafa Ozdal,et al. An Algorithmic Study of Exact Route Matching for Integrated Circuits , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[15] Jens Lienig,et al. Load-Aware Redundant Via Insertion for Electromigration Avoidance , 2016, ISPD.
[16] Rob A. Rutenbar,et al. KOAN/ANAGRAM II: new tools for device-level analog placement and routing , 1991 .
[17] Tai-Chen Chen,et al. Electromigration- and obstacle-avoiding routing tree construction , 2013, 2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT).
[18] Hung-Ming Chen,et al. Configurable analog routing methodology via technology and design constraint unification , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[19] Georges Gielen,et al. Analog IC Reliability in Nanometer CMOS , 2013 .
[20] Chris C. N. Chu,et al. FOARS: FLUTE Based Obstacle-Avoiding Rectilinear Steiner Tree Construction , 2011, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[21] Muhammet Mustafa Ozdal,et al. Algorithms for Maze Routing With Exact Matching Constraints , 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[22] I. Blech. Electromigration in thin aluminum films on titanium nitride , 1976 .
[23] Andrew B. Kahng,et al. On potential design impacts of electromigration awareness , 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).
[24] Jens Lienig,et al. Electromigration and its impact on physical design in future technologies , 2013, ISPD '13.
[25] Zheng Liu,et al. Performance-constrained template-driven retargeting for analog and RF layouts , 2010, GLSVLSI '10.
[26] Yao-Wen Chang,et al. Nonuniform Multilevel Analog Routing With Matching Constraints , 2014, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[27] Lihong Zhang,et al. Efficient ILP-based variant-grid analog router , 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).
[28] J. Gill,et al. Impact of via-line contact on Cu interconnect electromigration performance , 2005, 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual..