Automatic synthesis of SDL models in use case methodology

Formal description techniques (FDT’s) supported by computer-aided software engineering (CASE) tools are rapidly evolving as a response to the new challenges of the telecommunications industry, especially the need to improve “time-to-market” of software products. In this paper we summarize our experience in using automatic synthesis of formal models in ITU-T standard Specification and Description Language (SDL) to speed-up the software development process. Suggested accelerated methodology requires formalization of functional scenarios (use cases) using another ITU-T standard - Message Sequence Charts (MSC) extended with data operations. Our Moscow Synthesizer Tool (MOST-SDL) provides a bridge from MSC models to SDL executable specifications which can be simulated using SDL tools to provide an early feedback for the phases of requirements analysis, system analysis or system design. We present our synthesis algorithm, provide comparison with related work and discuss the results of a few case studies where the Moscow Synthesizer Tool was used together with Telelogic SDL tools for an accelerated MSC-based prototyping which involved incremental synthesis, validation and simulation of the formal model.