ARABICA: A Reconfigurable Arithmetic Block for ISA Customization

We propose a dynamically reconfigurable arithmetic block architecture for customizing embedded application processor instruction sets. Our architecture uses medium-grained arithmetic blocks and a dedicated but reconfigurable interconnection network to support a wide range of instruction-set extensions. Our experimental results demonstrate the performance of our arithmetic block compared to a general-purpose processor, and its area- and energy-efficiency compared to dedicated arithmetic circuits.