Multi-Core BDD Operations for Symbolic Reachability

This paper presents scalable parallel BDD operations for modern multi-core hardware. We aim at increasing the performance of reachability analysis in the context of model checking. Existing approaches focus on performing multiple independent BDD operations rather than parallelizing the BDD operations themselves. In the past, attempts at parallelizing BDD operations have been unsuccessful due to communication costs in shared memory. We solved this problem by extending an existing lockless hashtable to support BDDs and garbage collection and by implementing a lockless memoization table. Using these lockless hashtables and the work-stealing framework Wool, we implemented a multi-core BDD package called Sylvan. We provide the experimental results of using this multi-core BDD package in the framework of the model checker LTSmin. We measured the runtime of the reachability algorithm on several models from the BEEM model database on a 48-core machine, demonstrating speedups of over 30 for some models, which is a breakthrough compared to earlier work. In addition, we improved the standard symbolic reachability algorithm to use a modified BDD operation that calculates the relational product and the variable substitution in one step. We show that this new algorithm improves the performance of symbolic reachability and decreases the memory requirements by up to 40%.

[1]  Fabio Somenzi,et al.  Efficient manipulation of decision diagrams , 2001, International Journal on Software Tools for Technology Transfer.

[2]  Robert K. Brayton,et al.  High performance BDD package by exploiting memory hierarchy , 1996, DAC '96.

[3]  Gianfranco Ciardo,et al.  Parallelising Symbolic State-Space Generators , 2007, CAV.

[4]  Mathematisch-Naturwissenschaftlichen Fakultät,et al.  JINC { A Multi-Threaded Library for Higher-Order Weighted Decision Diagram Manipulation , 2009 .

[5]  Edmund M. Clarke,et al.  A parallel algorithm for constructing binary decision diagrams , 1990, Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

[6]  Gianfranco Ciardo,et al.  Saturation NOW , 2004 .

[7]  Forrest Brewer,et al.  Implementation of an efficient parallel BDD package , 1996, DAC '96.

[8]  Alan J. Hu,et al.  BDDNOW: A Parallel BDD Package , 1998, FMCAD.

[9]  Gianfranco Ciardo,et al.  SMART: the stochastic model checking analyzer for reliability and timing , 2004, First International Conference on the Quantitative Evaluation of Systems, 2004. QEST 2004. Proceedings..

[10]  Claude E. Shannon,et al.  A symbolic analysis of relay and switching circuits , 1938, Transactions of the American Institute of Electrical Engineers.

[11]  Gianfranco Ciardo,et al.  Parallel symbolic state-space exploration is difficult, but what is the alternative? , 2009, PDMC.

[12]  N. H. Beebe on Software Tools for Technology Transfer ( STTT ) , 2005 .

[13]  Assaf Schuster,et al.  A Work-Efficient Distributed Algorithm for Reachability Analysis , 2003, CAV.

[14]  Edmund M. Clarke,et al.  Symbolic model checking for sequential circuit verification , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[15]  Debashis Sahoo,et al.  Multi-threaded reachability , 2005, Proceedings. 42nd Design Automation Conference, 2005..

[16]  Silvano Gai,et al.  Boolean function manipulation on massively parallel computers , 1992, [Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation.

[17]  Edward P. Stabler,et al.  Parallel implementation of BDD algorithms using a distributed shared memory , 1994, 1994 Proceedings of the Twenty-Seventh Hawaii International Conference on System Sciences.

[18]  Alfons Laarman,et al.  Boosting multi-core reachability performance with shared hash tables , 2010, Formal Methods in Computer Aided Design.

[19]  P. Banerjee,et al.  Parallel construction algorithms for BDDs , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[20]  Saburo Muroga,et al.  Binary Decision Diagrams , 2000, The VLSI Handbook.

[21]  Craig M. Chase,et al.  Distributed binary decision diagrams for verification of large circuits , 1996, Proceedings International Conference on Computer Design. VLSI in Computers and Processors.

[22]  Karl-Filip Faxén Efficient Work Stealing for Fine Grained Parallelism , 2010, 2010 39th International Conference on Parallel Processing.

[23]  Jörn Ossowski,et al.  JINC: a multi-threaded library for higher-order weighted decision diagram manipulation , 2009 .

[24]  Roberto Ansaloni,et al.  Boolean Function Manipulation on a Parallel System Using BDDs , 1997, HPCN Europe.

[25]  Tom van Dijk,et al.  The parallelization of binary decision diagram operations for model checking , 2012 .

[26]  Philippas Tsigas,et al.  Brushing the Locks out of the Fur : A Lock-Free Work Stealing Library Based on Wool , 2009 .

[27]  Geert Janssen,et al.  Design of a Pointerless BDD Package , 2022 .

[28]  Kedar S. Namjoshi,et al.  Parallelizing a Symbolic Compositional Model-Checking Algorithm , 2010, Haifa Verification Conference.

[29]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[30]  David R. O'Hallaron,et al.  Parallel breadth-first BDD construction , 1997, PPOPP '97.

[31]  Hiroyuki Ochi,et al.  Breadth-first manipulation of SBDD of boolean functions for vector processing , 1991, 28th ACM/IEEE Design Automation Conference.

[32]  Nagisa Ishiura,et al.  Shared binary decision diagram with attributed edges for efficient Boolean function manipulation , 1990, 27th ACM/IEEE Design Automation Conference.

[33]  Assaf Schuster,et al.  A work-efficient distributed algorithm for reachability analysis , 2003, Formal Methods Syst. Des..

[34]  Mats Brorsson,et al.  A Comparison of some recent Task-based Parallel Programming Models , 2010 .

[35]  Silvano Gai,et al.  An improved data parallel algorithm for Boolean function manipulation using BDDs , 1995, Proceedings Euromicro Workshop on Parallel and Distributed Processing.

[36]  Gianfranco Ciardo,et al.  Ten Years of Saturation: A Petri Net Perspective , 2012, Trans. Petri Nets Other Model. Concurr..

[37]  Randal E. Bryant,et al.  Efficient implementation of a BDD package , 1991, DAC '90.

[38]  Radek Pelánek,et al.  BEEM: Benchmarks for Explicit Model Checkers , 2007, SPIN.

[39]  Jaco van de Pol,et al.  1 Motivation : A Modular , High-Performance Model Checker , 2010 .

[40]  D. M. Hutton,et al.  The Art of Multiprocessor Programming , 2008 .