Dynamic Voltage and Frequency Scaling based on Buffer Memory Access Information
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[1] Diana Marculescu,et al. Analysis of dynamic voltage/frequency scaling in chip-multiprocessors , 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).
[2] Kenji Funaoka,et al. Dynamic voltage and frequency scaling for optimal real-time scheduling on multiprocessors , 2008, 2008 International Symposium on Industrial Embedded Systems.
[3] Tajana Simunic,et al. Dynamic voltage frequency scaling for multi-tasking systems using online learning , 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).
[4] Massoud Pedram,et al. Fine-grained dynamic voltage and frequency scaling for precise energy and performance tradeoff based on the ratio of off-chip access to on-chip computation times , 2005 .
[5] David C. Snowdon,et al. Accurate on-line prediction of processor and memoryenergy usage under voltage scaling , 2007, EMSOFT '07.
[6] Albert Mo Kim Cheng,et al. A Dynamic Voltage Scaling Algorithm for Dynamic Workloads , 2008, J. Signal Process. Syst..
[7] Margaret Martonosi,et al. The XTREM power and performance simulator for the Intel XScale core: Design and experiences , 2007, TECS.
[8] Norbert Wehn,et al. XEEMU: An Improved XScale Power Simulator , 2007, PATMOS.
[9] David A. Patterson,et al. Computer Architecture: A Quantitative Approach , 1969 .