Implementing BIST and boundary-scan in a digital signal processor ASIC for radiocommunication applications

This paper describes the testability strategy used in the design of a complex DSP VLSI for radiocommunication applications. A solution based on the use of a micro-coded BIST has been chosen. The IEEE 1149.1 boundary scan test is used to control the chip self-test. The BIST structures provide go/no-go flags as well as diagnosis capabilities using signature analysis.<<ETX>>

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