Designing analog and RF circuits for ultra-low supply voltages

This paper investigates the challenges and opportunities of designing analog and RF integrated circuits to operate from ultra-low supply voltages. Solutions ranging from exploiting the 4 terminals of a MOS device or the threshold voltage dependence on length, to the use of circuit topologies that require only stacks of two devices are discussed. The realization of full analog and RF system functions operating from ultra-low voltages is demonstrated and the enabling architecture modifications are introduced. The techniques and results presented in this paper aim to enable ultra-low voltage analog and RF circuits both in the context of relatively large threshold voltages, e.g., |VT|=VDD, as well as lower threshold voltages.

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