A 5GHz low power receiver front-end RFIC with one tail current implemented in SiGe BiCMOS technology
暂无分享,去创建一个
[1] Asad A. Abidi,et al. A merged CMOS LNA and mixer for a WCDMA receiver , 2003 .
[2] R. Castello,et al. Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell , 2006, IEEE Journal of Solid-State Circuits.
[3] D. Kasperkovitz,et al. A 0.9-2.2 GHz monolithic quadrature mixer oscillator for direct-conversion satellite receivers , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.
[4] J. Laskar,et al. A SiGe dual-band dual-mode RF front end with a novel architecture for IEEE 802.11a/b/g wireless LAN applications , 2004, Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting.
[5] Thomas H. Lee,et al. The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES , 2003 .
[6] Peter Laaser,et al. An 802.11a/b/g RF Transceiver in an SoC , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[7] Antonio Liscidini,et al. A 2.4 GHz 3.6mW 0.35mm2 Quadrature Front-End RX for ZigBee and WPAN Applications , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.