Recent advances in terms of performance and scalability of Gechannel pFETs have been reported [1]-[9], confirming Germanium as a serious contender to Silicon for future high performance devices. Significant efforts in terms of material quality have led to reduced I<inf>OFF</inf> currents [1], [3], [4]. However, in Ge-On-Si substrates, an important part of the Off-State Drain current remains due to bulk leakage [3]. Regarding the GeOI option [1],[6]-[8] I<inf>OFF</inf> was so far limited by defects arising from the Ge/BOx interface, degrading the minority carriers lifetimes and inducing a parasitic conduction of the back-channel [10]. It was recently shown that the I<inf>ON</inf>/I<inf>OFF</inf> ratio could dramatically be improved in a Gate-All-Around Ge-channel device (L<inf>g</inf>=1.3µm) [4]. In this work, thanks to recent developments in the Ge enrichment process [11]-[14], we reduced the defectivity of Germanium while decreasing the Ge film thickness to 25nm. The fabricated High-κ/Metal Gate pFETs exhibit controlled V<inf>th</inf> and SCE, thus maintaining an excellent I<inf>ON</inf>/I<inf>OFF</inf> ratio at more than 10<sup>5</sup> down to L<inf>g</inf>=55nm (DIBL=140mV/V). Functional transistors were obtained for gate lengths as small as 30nm, which are the shortest reported so far in the literature (ref.[2]: L<inf>g</inf>=60nm). The resolution of the I<inf>OFF</inf> issue in planar Ge pFETs opens new perspectives for HP applications.
[1]
A. Majumdar,et al.
Mobility Scaling in Short-Channel Length Strained Ge-on-Insulator P-MOSFETs
,
2008,
IEEE Electron Device Letters.
[2]
Yves Morand,et al.
High quality Germanium On Insulator wafers with excellent hole mobility
,
2007
.
[3]
R. Chau,et al.
Benchmarking nanotechnology for high-performance and low-power logic transistor applications
,
2004,
IEEE Transactions on Nanotechnology.
[4]
T. Tezuka,et al.
High-mobility strained SiGe-on-insulator pMOSFETs with Ge-rich surface channels fabricated by local condensation technique
,
2005,
IEEE Electron Device Letters.